دوره 18، شماره 3 - ( 10-1400 )                   جلد 18 شماره 3 صفحات 18-3 | برگشت به فهرست نسخه ها


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Esmaeili M R, Zahiri S H, Razavi S M. An efficient CAD tool for High-Level Synthesis of VLSI digital transformers. JSDP 2021; 18 (3) :3-18
URL: http://jsdp.rcisp.ac.ir/article-1-983-fa.html
اسماعیلی محمدرضا، ظهیری سید حمید، رضوی سید محمد. ارائه ابزاری کارآمد برای سنتز سطح بالای مبدل‌های دیجیتال مدارهای VLSI. پردازش علائم و داده‌ها. 1400; 18 (3) :3-18

URL: http://jsdp.rcisp.ac.ir/article-1-983-fa.html


دانشگاه بیرجند
چکیده:   (1777 مشاهده)
امروزه مبدل­‌های دیجیتال از مهم‌­ترین ادوات یک سامانه پردازش سیگنال و داده به‌شمار رفته و به­‌صورت گسترده در زمینه پردازش صوت، تصویر و سیگنال­‌های حیاتی به‌­کار گرفته می‌­شوند. در طراحی مبدل‌های دیجیتال VLSI، سنتز سطح بالا (HLS) یکی از مراحل مهم و تأثیرگذار به شمار می رود. هدف اصلی از انجام این کار، کمینه‌کردن واحدهای پایه دیجیتالی مورد استفاده در پروژه مفروض جهت بهبود توان، تأخیر، و سطح مصرفی آن­ها است. این کار عمدتاً با تحلیل گراف مسیر داده (DFG) اتفاق می­افتد. بهبود در این مرحله، علاوه‌بر بازدهی بیشتر باعث کاهش زمان طراحی در مراحل پایین­‌تر می‌شود. ماهیت پیچیده، گسترده و گسسته مسائل سنتز سطح بالا، باعث شده است که آنها در زمره مسائل بسیار دشوار در مهندسی مدارات VLSI به‌­شمار آیند؛ از این‌­رو استفاده از روش‌های فراابتکاری و هوش­جمعی جهت حل پروژه‌­های مرتبط با سنتز سطح بالا، گزینه‌­ای مطلوب به نظر می‌­رسد. در این مقاله روشی مبتنی­بر الگوریتم فراابتکاری "شعله و پروانه"(MFO) جهت یافتن بهترین طرح سخت‌­افزاری برای انواع مبدل‌­های دیجیتال ارائه شده است. نتایج مقایسه‌­ای در کنار نتایج حاصل از روش مبتنی ­بر الگوریتم ژنتیک (GA) نشان داد که روش پیشنهادی از توانایی بالاتری در ارائه ساختار سخت‌­افزاری مناسب و سنتز سطح بالای انواع مبدل‌ها برخوردار است. همچنین ویژگی دیگر روش پیشنهادی، سرعت بالای آن در یافتن پاسخ بهینه است (میانگین برتری بیش از 20% نسبت­ به GA).
متن کامل [PDF 1090 kb]   (531 دریافت)    
نوع مطالعه: پژوهشي | موضوع مقاله: مقالات پردازش داده‌های رقمی
دریافت: 1397/12/14 | پذیرش: 1398/11/2 | انتشار: 1400/10/30 | انتشار الکترونیک: 1400/10/30

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